Use of programmable logic devices to overcome voltage and current signals by the time of measurement error, and also provided a data storage space. 利用可编程逻辑器件克服电压信号和电流信号分时测量所带来的误差,同时也提供了数据存储空间。
SSDS is for developers and businesses that need scalable, easily programmable, and cost-effective data storage with robust database query capabilities. SSDS是为那些对系统扩展性有要求、需要简化编程、及对数据存储有强健查询能力的需求而又对成本敏感的开发者和商业应用而设计。
Based on the ARM embedded micro-processor, using the programmable logical device CPLD as scheduling controller unit to conduct image disposal, segmentation and matching program, this method integrates with the image acquisition, storage, transmission and disposal. 基于ARM嵌入式微处理器,以复杂可编程逻辑器件CPLD作为时序控制单元,进行图像处理、分割,实现了图像信息的采集、存储、传输及处理为一体。
The paper also suggests to use programmable logic device ( PLD) as logic control chip to control SDRAM, and so makes it possible to use SDRAM in projects, thus offers a new way to electronic design in which high speed and huge storage memory is needed. 提出了用可编程逻辑器件作为逻辑控制芯片对内存条进行控制,从而使在工程项目中使用计算机内存条成为可能,为需要大容量高速存储器的电子设计提供了一种新的思路。
The software based on VC++ 6.0. Several key problems including the data acquisition card class, the setting of the programmable timer, data storage have been resolved. 论文针对软件开发中数据采集卡类实现、采集系统精确定时、数据存储等关键技术进行了系统研究。
Application of a special programmable structure which can save PLC storage space 一种能够节省PLC存储空间的特殊程序结构的应用
Utilizing phase locked loop technique with complex programmable logic devices ( CPLD), a method to perform high-speed data acquisition, storage and transmission for transformer testing, which solves the problem of data acquisition for high frequency band, is proposed. 提出了利用锁相环技术结合复杂可编程逻辑器件(CPLD)实现对变压器测试信号的高速采集、存储、传输的方法,很好地解决了对变压器高频特性信号的采集。
The system chose programmable logic device and ping-pang operation in order to improve storage speed effectively. 系统选择可编程逻辑器件采用分时存储技术和乒乓操作来完成图像数据的存储,有效的提高了存储速度。
To utilization of the programmable resources, another resource BRAM ( Block RAM) in the FPGA is used as intermediate data storage media to reducing the use of FPGA programmable resources Slices. 在可编程资源的利用率上,使用FPGA上的BlockRAM作为中间数据的存储介质,降低了FPGA编程资源Slices的使用。
A high-performance AD chip, solid-state FLASH memory chips and FPGA ( Field Programmable Gates Array) are used to realize high-speed data acquisition and real-time data storage for the system. 该系统以高性能ADC芯片为基础、以固态存储芯片FLASH为存储介质、以FPGA(现场可编程门阵列)为控制核心成功实现了高速采集、实时大容量存储。
The master chip in this design use a dedicated digital signal processor DSP chip and programmable logic chip in dealing with complex signal selection and storage the data handled. 本设计的主控芯片选用了专用的数字信号处理器DSP芯片,并且在处理复杂的信号选择关系和存储处理后的数据时使用了可编程逻辑芯片。
The birth of programmable devices brought enormous significance to the storage test system. 可编器件的诞生给存储测试系统带来了巨大的意义。